Thermal Component models, part 4

Back ground article.....: Thermal component models, part 3
Calculator......................: Thermal resistance from pads to inner layers
Home page....................: Frigus primore home page

Introduction

This may not be the last article that I write about component modelling but it is the last one in this series. This time it is about the thermal interface between pads and the inner layers of a PCB. It is an aspect of component modelling that not often is addressed but still is very important.

The problem can always be treated with a finite element approach. This method is both accurate and straightforward but it also has disadvantages. It is relatively slow and it must be based on a detailed description of the copper patterns in the PCB, which not always is available. The approximate method outlined below is therefore well worth studying.


Figure 1
Conduction basics.

Basics

A PCB is a laminated structure of copper and bulk material; usually glass-epoxy also called FR4. There are basically three types of copper layers: signal, power and ground. The two latter are similar from the thermal point of view and will therefore here simple be referenced as ground layers. Signal layers are heavily etched structures and the remaining copper content is typically <30%. Ground layers are almost intact and typically have a copper content >70%.

The full complexity of a PCB is quite difficult to deal with. Figure 1 shows a simplification that often is done. It simulates the PCB as a core of a virtual material that handles heat conduction in the plate directions, surrounded by two layers of bulk material that handle conduction in the z-direction. The thickness of the latter is usually set to the distance from the surface to the first ground layer.

Another basic is the way thermal resistances can be calculated for bodies with non-uniform cross sections, figure 1. The equations shown are approximations that in this context can be regarded as sufficiently good.


Figure 2
Conduction from signal lines and pads can be treated with the 45-degree rule.

Conduction from a heated spot on the surface of a PCB down to the inner layers is a bit different. The heat spreads in all directions so there is no physical structure that can be identified as a flow channel. There is fortunately a solution to this problem. It is called the 45-degree rule, figure 2. It sometimes comes with a different angle but the 45-degree rule is good enough for this purpose and will never result in an error larger than 15%.



Figure 3
Some approaches for pads.

Pads

Figure 3 shows the basic principle for estimating the thermal resistance from pads to the first ground layer. It is very simple and the only difficulty is that the 45-degree rule sometimes results in overlaps. A two step approach is recommended for those cases.

Pad arrays come in many different configurations. For components with leads around their circumference they are rather single rows. In other cases they are conventional arrays but with an empty space in the middle. The general principle not to allow overlaps can nevertheless always be applied. Circular pads are best simulated as a quadratic structures with the equivalent surface.



Figure 4
Conduction from a signal line to the ground layer.

Signal lines

Figure 4 shows a signal line connected to a pad and the associated temperature profile. It is apparent that the surface temperature eventually must reach the same temperature as the inner layers. A consequence of this is that there also must be a minimum thermal resistance.

The problem can essentially be treated in the same way as the fin efficiency problem. The result is the solution shown figure 4. The g-factor is a function of the bulk properties and the r-factor a function of the signal line properties. R0 is the thermal resistance that is reached for an infinitely long line. The critical length, Lcrit, is an important parameter because it can be put on an easily understandable scale. When the length of a signal line equals the critical length, the thermal resistance is 1.31xR0.


Figure 5
The critical length is a couple of millimetres for typical cases. Copper layer thickness 35 um.

Figure 5 shows the order of the critical length for typical conditions on a PCB. It should be noted that it only is a few millimetres long. The temperature gradients near pads are consequently also quite large. Signal lines typically contribute less to the surface-to-inner layer conduction than do the pads but their impact is not negligible.



Figure 6
The thermal resistance in a ground connection can be estimated with a rectangular approximation.

Ground connections

IC-circuits usually have quite a few ground connections, in some cases as many as 50% of the leads. There are designs in which the surface copper layer also is a ground layer but they are not common. Ground connections are therefore in most cases made through the means of via holes. These holes always have a copper layer on their walls that roughly has the same thickness as the surface layer. This direct metal contact between the surface and the ground layers creates a good flow path. Ground connections are therefore sometimes used for pure thermal purposes. It is not important if they are solder filled or not. The thermal conductivity for solder is a tenth of that for copper. The solder therefore only contributes marginally.

The total thermal resistance for a ground connection is however not only dependent on the properties of the hole itself but also on the annular copper structure that surrounds and it. A rectangular approximation combined with the 45-degree rule helps to clarify this issue, figure 6. It is obvious that the signal line width has a large impact. Analyses of this kind yield that the total thermal resistance can be as much as a factor 4 higher than that for the hole alone.



Figure 7
Solution to the combined signal line and ground via conduction problem.

Given that the critical length for signal lines only is a couple of millimetres it is obvious that a ground connection must be placed near a pad to be thermally effective. The solution to this conduction problem is not too complex, figure 7. It includes the impact of the via hole, represented by the thermal resistance Rvia and the impact from the signal line, represented by the thermal resistance R0.


Figure 8
The impact of a ground via connection decreases rapidly with the distance from the pad and at 2 critical lengths it has practically disappeared.

Figure 8 shows the impact of the distance between the pad and the via hole for a typical case. The contribution from the via hole has practically ceased at about 2 critical lengths. It is therefore apparent that there is a lot to gain by placing the via holes as near the pads as possible. There are unfortunately design rules that set a lower limit for this distance.



Figure 9
Pad patterns used for the examples.

Two examples

It is interesting to get an idea to what extent the pad-to-inner layer thermal resistance contributes the total junction-to-inner layer thermal resistance. Two examples may help to clarify this issue. The following data was common for both:

Thermal conductivity of copper	390 W/mK
Thermal conductivity of bulk material	0.23 W/mK
Copper layer thickness	35 um
Signal layer width	0.13 mm
Via hole diameter	0.3 mm
Via hole outer diameter	0.6 mm
Pad to via hole distance	0.3 mm
Pad pitch	1.27 mm

The pads in the PLCC 44 example were 0.63x2.0 mm. 6 near ground connections were accounted for. All other pads were assumed to have 1 long signal line. The junction-to-pad resistance for the component was assumed to be 20 K/W. The result is shown in table 1. It indicates that the pad-to-inner layer resistance, Rpb, can represent as much as 30% of the total junction-to-inner layer resistance, Rjb.

Grd-dist [mm]	Lcrit [mm]	Rpads [K/W]	Rsignal lines [K/W]	Rgrounds [K/W]	Rpb [K/W]	Rjb [K/W]	Rpb/Rjp [%]
0.1	1.9	6.5	28.1	37.3	4.6	24.6	19
0.2	2.3	11.2	34.5	39.1	7.0	27.0	26
0.3	2.6	14.8	38.3	40.5	8.4	28.4	30
0.4	2.8	17.7	40.9	41.8	9.5	29.5	32

Table 1
PLCC 44 example.

The pads in the CBGA 255 example were 0.83x0.83 mm. 16 near ground connections were accounted for. The average length of all other signal lines was assumed to be one critical length. The junction-to-pad resistance for the component was set to 3.5 K/W. The result is shown in table 2 and indicates that the pad-to-inner layer resistance, Rpb, can represent as much as 40% of the total junction-to-inner layer resistance, Rjb.

Grd-dist [mm]	Lcrit [mm]	Rpads [K/W]	Rsignal lines [K/W]	Rgrounds [K/W]	Rpb [K/W]	Rjb [K/W]	Rpb/Rjp [%]
0.1	1.9	2.0	5.9	14.0	1.3	4.8	28
0.2	2.3	3.3	7.2	14.7	2.0	5.5	36
0.3	2.6	4.4	8.0	15.2	2.4	5.9	41
0.4	2.8	5.5	8.5	15.7	2.7	6.2	44

Table 2
CBGA 255 example


Conclusion

Even if the method outlined above not is 100% correct it does show that the pad-to-inner layer thermal resistance is of such an order that it not can be neglected.